Reference number
ISO/IEC 18372:2004
ISO/IEC 18372:2004
© ISO 2025
International Standard
ISO/IEC 18372:2004
Information technology — RapidIO(TM) interconnect specification
Edition 1
2004-12
2004-12
ISO/IEC 18372:2004
38668
Published
(Edition 1, 2004)
This publication was last reviewed and confirmed in 2018.
Therefore this version remains current.
Abstract
The RapidIO architecture was developed to address the need for a high-performance low pin count packet-switched system level interconnect to be used in a variety of applications as an open standard. The architecture is targeted toward networking, telecom, and high performance embedded applications. It is intended primarily as an intra-system interface, allowing chip-to-chip and board-toboard communications at Gigabyte per second performance levels. It provides a rich variety of features including high data bandwidth, low-latency capability and support for high-performance I/O devices, as well as providing globally shared memory, message passing, and software managed programming models.
General information
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Status: PublishedPublication date: 2004-12Stage: International Standard confirmed [90.93]
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Edition: 1Number of pages: 405
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Technical Committee :ISO/IEC JTC 1/SC 25ICS :35.100.30
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